RustEDA Common

Shared typed models, file formats, disk workspaces, CLI contracts and deterministic compute kernels.

All RustEDA modules

• Core models
• Workspace
• Compute
• Verilog
• Liberty
• SDC

Development update · 2026-11-01

The foundation now includes the IHP/SRAM interface work used by the qualified Ibex flow: Liberty memory buses and pin metadata, explicit driving-cell constraints, escaped mapped-netlist identifiers, and bounded connectivity exports. The deterministic CPU RC charge-fitting implementation uses f64.

Source, evidence and remaining limits